View ICS570A_81519.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

ICS570A Multiplier and Zero Delay Buffer
Description
The ICS570A is a high performance Zero Delay Buffer (ZDB) which integrates ICS' proprietary analog/digital Phase Locked Loop (PLL) techniques. ICS introduced the world standard for these devices in 1992 with the debut of the AV9170. The ICS570A, part of ICS' ClockBlocksTM family, was designed as a performance upgrade to meet today's higher speed and lower voltage requirements. The zero delay feature means that the rising edge of the input clock aligns with the rising edges of both outputs, giving the appearance of no delay through the device. There are two outputs on the chip, one being a low-skew divide by two of the other. The chip has an all-chip power down/tri-state mode that stops the internal PLL and puts both outputs into the high impedance state. The chip is ideal for synchronizing outputs in a large variety of systems, from personal computers to data communications to video. By allowing off-chip feedback paths, the ICS570A can eliminate the delay through other devices. The ICS570A was done to improve jitter from the original ICS570, and so it is recommended for all new designs.
Features
* Packaged in 8 pin SOIC. * Pin-for-pin replacement and upgrade to ICS570 * Functional equivalent to AV9170 (not a pinfor-pin replacement). * Low input to output skew of 500 ps max. * Low skew (250 ps) outputs. One is / 2 of other. * Ability to choose between 14 different multipliers from 0.5X to 32X. * Input clock frequency up to 150 MHz at 3.3V. * Can recover poor input clock duty cycle. * Output clock duty cycle of 45/55. * Power Down and Tri-State Mode. * Full CMOS clock swings with 25mA drive capability at TTL levels. * Advanced, low power CMOS process. * Operating voltage of 3.0 to 5.5 V. * Industrial temperature version available
Block Diagram
ICLK S1, S0
2
FBIN
divide by N
Phase Detector, Charge Pump, and Loop Filter
Voltage Controlled Oscillator /2
Output Buffer
CLK
Output Buffer
CLK/2
External feedback can come from CLK or CLK/2 (see table on page 2).
1 Revision 102700 Printed 11/14/00 Integrated Circuit Systems, Inc .* 525 Race Street * San Jose * CA *95126* (408)295-9800tel *www.icst.com
MDS 570A C
ICS570A Multiplier and Zero Delay Buffer
Clock Multiplier Decoding Table Pin Assignment
S1 VDD GND ICLK 1 2 3 4 8 7 6 5 CLK/2 CLK S0 FBIN (Multiplies input clock by shown amount)
S1 #1 0 0 0 M M M 1 1 1 S0 #6 0 M 1 0 M 1 0 M 1 FBIN from CLK FBIN from CLK/2 CLK CLK/2 CLK CLK/2 pin # 7 pin # 8 pin # 7 pin # 8 Power Down and Tri-State x3 x1.5 x6 x3 x4 x2 x8 x4 x8 x4 x16 x8 x6 x3 x12 x6 x10 x5 x20 x10 x1 /2 x2 x1 x16 x8 x32 x16 x2 x1 x4 x2 ICLK Input Range FB from CLK/2 * (3.3V, MHz)
-
8 pin SOIC
2.5 to 25 2.5 to 19 2.5 to 9.5 2.5 to 12.5 2.5 to 7.5 5 to 75 2.5 to 5 2.5 to 37.5
0 = connect directly to ground. M = leave unconnected (self-biases to VDD/2). 1 = connect directly to VDD. *Input range with CLK feedback is double that for CLK/2.
Pin Descriptions
Number 1 2 3 4 5 6 7 8 Name S1 VDD GND ICLK FBIN S0 CLK CLK/2 Type I P P CI CI I O O Description Select 1 for output clock. Connect to GND, VDD, or float per decoding table above. Connect to +3.3V or +5V. Connect to ground. Reference clock input. Feedback clock input. Select 0 for output clock. Connect to GND, VDD, or float per decoding table above. Clock output per Table above. Clock output per Table above. Low skew divide by two of pin 7 clock.
Key: CI = clock input, I = input, O = output, P = power supply connection
External Components
The ICS570A requires a 0.01 F decoupling capacitor to be connected between VDD and GND. It must be connected close to the ICS570A to minimize lead inductance. No external power supply filtering is required for this device. A 27 terminating resistor can be used next to each output pin.
2 Revision 102700 Printed 11/14/00 Integrated Circuit Systems, Inc .* 525 Race Street * San Jose * CA *95126* (408)295-9800tel *www.icst.com
MDS 570A C
ICS570A Multiplier and Zero Delay Buffer
Electrical Specifications
Parameter ABSOLUTE MAXIMUM RATINGS (Note 1) Supply Voltage, VDD Inputs Clock Output Ambient Operating Temperature Conditions Referenced to GND Referenced to GND Referenced to GND ICS570M ICS570MI Max of 10 seconds Minimum Typical Maximum 7 VDD+0.5 VDD+0.5 70 85 260 150 5.5 0.8 VDD-0.5 VDD/2 0.5 VDD-0.4 2.4 0.4 22 12 50 5 2.5 10 50 -500 -1.0 -750 -1.5 -1.0 0.75 0.75 0.5 0.5 49 to 51 150 150 150 500 1.0 750 1.5 1.0 Units V V V C C C C V V V V V V V V V mA mA mA pF MHz MHz ps ps ns ps ns ns ns ns ns ns %
-0.5 -0.5 0 -40 -65 3 2
Soldering Temperature Storage temperature DC CHARACTERISTICS (VDD = 3.3V or 5.0V unless otherwise noted) Operating Voltage, VDD Input High Voltage, VIH, VDD=5V ICLK, FBIN Input Low Voltage, VIL, VDD=5V ICLK, FBIN Input High Voltage, VIH S0, S1 Input High Voltage, VIM (mid-level) S0, S1 Input Low Voltage, VIL S0, S1 Output High Voltage, VOH, CMOS level IOH=-4mA Output High Voltage, VOH IOH=-12mA Output Low Voltage, VOL IOL=12mA IDD Operating Supply Current, 50 in, 100 out No Load, 5.0V IDD Operating Supply Current, 50 in, 100 out No Load, 3.3V Short Circuit Current Each Output Input Capacitance, S1, S0 AC CHARACTERISTICS (VDD = 3.3V or 5.0V unless otherwise noted) Input Frequency, ICLK (see table on page 2) Output Clock Frequency, CLK Skew of output clocks Note 2 Input skew, ICLK to FBIN Note 2 VDD=3.3V, CLK>10MHz Input skew, ICLK to FBIN Note 2 VDD=3.3V, CLK<5MHz Input skew, ICLK to FBIN Note 2 VDD=3.3V, CLK<10MHz Input skew, ICLK to FBIN Note 2 VDD=5V, CLK<10MHz Input skew, ICLK to FBIN Note 2 VDD=5V, CLK>10MHz Output Clock Rise Time, 3.3V 0.8 to 2.0V, note 3 Output Clock Fall Time, 3.3V 2.0 to 0.8V, note 3 Output Clock Rise Time, 5V 0.8 to 2.0V, note 3 Output Clock Fall Time, 5V 2.0 to 0.8V, note 3 Output Clock Duty Cycle at VDD/2 Notes
45
55
1. Stresses beyond these can permanently damage the device 2. Assumes clocks with same rise time, measured from rising edges at VDD/2. 3. With 27 terminating resistor and 15 pF loads.
3 Revision 102700 Printed 11/14/00 Integrated Circuit Systems, Inc .* 525 Race Street * San Jose * CA *95126* (408)295-9800tel *www.icst.com
MDS 570A C
ICS570A Multiplier and Zero Delay Buffer
All jitter values measured at 25 C with 27 series termination resistors and 15pF loads on both CLK and CLK/2. The feedback is from CLK/2 to FBIN. Note that if an output is unused, it should be left unconnected. This will give lower output jitter. One Sigma Clock Period Jitter (ps), VDD = 3.3 V CLK CLK/2
ICLK Frequency (MHz)
CLK Frequency (MHz)
<5 5 - 10 >10
<20 145 100 --
20 - 50 70 65 50
>50 85 85 85
ICLK Frequency (MHz)
CLK/2 Frequency (MHz)
<5 5 - 10 >10
<10 200 135 --
10 - 25 100 70 50
>25 20 20 20
Absolute Clock Period Jitter (ps), VDD = 3.3V CLK
ICLK Frequency (MHz)
CLK/2
ICLK Frequency (MHz)
CLK Frequency (MHz)
CLK/2 Frequency (MHz)
<5 5 - 10 >10
<20 850 370 --
20 - 50 350 270 140
>50 180 180 180
<10 1100 500 --
10 - 25 600 350 160
>25 90 90 90
<5 5 - 10 >10 CLK/2
ICLK Frequency (MHz)
One Sigma Clock Period Jitter (ps), VDD = 5 V CLK
ICLK Frequency (MHz)
CLK Frequency (MHz)
CLK/2 Frequency (MHz)
<5 5 - 10 >10
<20 130 120 --
20 - 50 100 100 70
>50 120 120 120
<5 5 - 10 >10 CLK/2
ICLK Frequency (MHz)
<10 50 60 --
10 - 25 25 35 30
>25 20 20 25
Absolute Clock Period Jitter (ps), VDD = 5 V CLK
ICLK Frequency (MHz)
CLK Frequency (MHz)
CLK/2 Frequency (MHz)
<5 5 - 10 >10
MDS 570A C
<20 270 270 --
20 - 50 180 220 160
>50 230 230 230
<5 5 - 10 >10
<10 170 210 --
10 - 25 100 100 100
>25 50 80 90
4 Revision 102700 Printed 11/14/00 Integrated Circuit Systems, Inc .* 525 Race Street * San Jose * CA *95126* (408)295-9800tel *www.icst.com
ICS570A Multiplier and Zero Delay Buffer
Recommended Circuit:
S1 VDD GND S0 INPUT FBIN CLK CLK/2
ICLK CLK CLK/2 x2 Mode (S1, S0 = 1, 1) CLK Feedback
ICK CLK CLK/2 x2 Mode (S1, S0 = 1, 0) CLK/2 Feedback
Using CLK as the feedback will always result in synchronized rising edges between ICLK and CLK. But the CLK/2 could be a falling edge compared with ICLK. Therefore, wherever possible, we recommend the use of CLK/2 feedback. This will synchronize the rising edges of all 3 clocks.
5 Revision 102700 Printed 11/14/00 Integrated Circuit Systems, Inc .* 525 Race Street * San Jose * CA *95126* (408)295-9800tel *www.icst.com
MDS 570A C
ICS570A Multiplier and Zero Delay Buffer
Package Outline and Package Dimensions (For current dimensional specifications, see JEDEC Publication No. 95.) 8 pin SOIC
Symbol A A1 B C D E e H h L JEDEC Dimensions Min Max 0.0532 0.0688 0.004 0.0098 0.0130 0.0200 0.0075 0.0098 0.1890 0.1968 0.1497 0.1574 .050 BSC 0.2284 0.2440 0.0099 0.0195 0.0160 0.0500 Millimeters Min Max 1.35 1.75 0.10 0.25 0.33 0.51 0.19 0.25 4.80 5.00 3.80 4.00 1.27 BSC 5.80 6.20 0.25 0.50 0.41 1.27
E
INDEX AREA
H
D A1 e C
h x 45
A L
B
Ordering Information
se of Part/Order Number ICS570A ICS570AT ICS570AI ICS570AIT ICS570M ICS570MT ICS570MI ICS570MIT Marking ICS570A ICS570A ICS570AI ICS570AI ICS570M ICS570M ICS570I ICS570I Package 8 pin SOIC 8 pin SOIC on tape and reel 8 pin SOIC 8 pin SOIC on tape and reel 8 pin SOIC 8 pin SOIC on tape and reel 8 pin SOIC 8 pin SOIC on tape and reel Temperature 0 to 70 C 0 to 70 C -40 to +85 C -40 to +85 C 0 to 70 C 0 to 70 C -40 to +85 C -40 to +85 C
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments.
ClockBlocks is a trademark of ICS
6 Revision 102700 Printed 11/14/00 Integrated Circuit Systems, Inc .* 525 Race Street * San Jose * CA *95126* (408)295-9800tel *www.icst.com
MDS 570A C

▲Up To Search▲

Price & Availability of ICS570A

	To Download ICS570A Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .